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CAM/Data Preparation

Data preparation is one of the most important, yet most ignored, steps for trouble-free electrical testing. PentaLogix understands that good, clean data, properly prepared for your testing methodology is key to successful PCB electrical testing and verification/repair. That is why FixMaster provides a powerful CAM workstation. Whether it's Universal or Dedicated Fixturing, CAMMaster has the features to ensure properly prepared data.

For the CAMMaster product specifications, please click here.

NC Drilling and Routing

FixMaster includes a complete NC Drilling and Routing module that gives you the features required to build today's complex fixtures. The module includes such advanced features as Counter boring, Slotting, Peck Drilling and Pocket Routing, to name a few. Point and click menus, saved table configurations, and true WYSIWYG graphics ensure ease of use.

For the complete RoutMaster specifications, please click here.

Fixturing

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Flexibility, advanced features, and ease of use are hallmarks of PentaLogix's fixturing module.

In today's diverse market, you need flexibility to fixture for PCBs of varying levels of complexity. Because you may have different fixture styles in your test department, PentaLogix has made switching between multiple setups easy. All system parameters and configurations are saved in one job file. Save a job for each setup. When you need to process a similarly configured job, you load the old job file, and you are ready to go. Job files also serve another purpose. When you complete a fixturing project, all your Net data, Drill files, Tester downloads, Repair data, etc. are saved in a single job file. Imagine, one file for a complete job.

PentLogix incorporates many advanced algorithms, such as Priority Pin Drop, Ring Net identification, and a Dynamic Drill Table. Some to ensure proper pin placement from the personality of the PCB to your grid configuration, some to ensure complete and accurate test, and some to ensure manufacturability of the fixture.

Easy-to-use features such as point-and-click menus, on-line DRC, and Help menus make complex fixturing tasks a breeze.

Join the hundreds of PentaLogix customers who have converted from old fixturing processes to our modern stream-lined process.

The following are highlights of the fixturing module:

  • Netlist, Gerber, or Drill Data Input
  • Removal of Padstacks on Import of Netlist
  • Single, Double, or Multi-Pass Fixtures
  • Single, Double, Quad-Density Grids, or User-Definable Multi-Density grids.
  • Split Net: Single or Multi Fixture
  • Flip-Test: Single or Multi-Fixture
  • Separate Configuration for Component and Solder Side Fixtures
  • Up to 49 user-definable Plates Per Fixture, Component and Solder Side
  • Up to 49 Probe Styles Per Fixture, Component and Solder Side
  • Dedicated Wire & Clam Shell Support
  • Global Netlist Replace
  • Panelization of Netlist
  • Tester Netlist Download
  • AutoGen (automatic fixture script)
  • ASCII Reports
  • On-line DRC Checking
  • Graphic Display of Net Data

Split Net

This feature allows you to split nets out of a single netlist onto two separate fixtures, offset on the same fixture, or run a combination fixture and flying probe test. It also allows you to split two bottom fixtures and one top fixture, or vice versa. Splitting parameters are as follows:

  • A Single Net: You may select a net by name or number, or graphically pick with a mouse.
  • Group of Nets: Use the window to select points in a group of nets (i.e. a complex component). Each entire net will be located and transferred.
  • All Unassigned Points: After assigning test points to grid, all unassigned points and related net points are moved for a second pass test.
  • Selected Group of Unassigned Points: After assigning test points to grid, unassigned points selected by the window and related net points are moved for a second pass test.
  • Split Flip: Will move unassigned test points and one tested point of the same net for a second pass.

Net Replace

This feature allows you to bring in a new source netlist for an existing fixture and generate a new tester netlist download. The module analyzes the differences between the existing fixture and new conductivity points. If no new pad positions are required, you can create a new download for your tester. If additional pad locations are required, the fixturing module will create a new drill file with only the new hole locations. This feature can save many hours of drill time and help salvage fixtures between revision changes.

Priority Pin + Density Drop

This is very important in solving high-density BGAs!

Priority pin drop allows you to give priority to hard-to-solve areas of the PCB. You control the sequence in which your PCB will be analyzed. Define selected windowed areas, test pin types, or a cursor position to be assigned to grid first. The rest of the PCB will automatically be assigned after these priority areas. Or let the system automatically find the densest areas of the PCB and drop those pins before dropping pins for the rest of the board.

Test Point Generation

With complex testing requirements, fixturing issues, and tester limitations you need flexibility to fulfill today's testing demands. PentaLogix provides flexibility in the following test point generation options:

  • Single Point Nets: Generates test points for complete nets that have only one point.
  • Use Gerber Solder Mask: Uses Gerber solder mask data to identify exposed pad landings.
  • Use Gerber Silk Screen: Uses Gerber silk screen data to identify exposed pad landings.
  • Balance Through-Holes: Evenly balances probe placement between top and bottom fixtures.
  • One Test Point Per Net: Generates only a single test point per net.
  • Component Side Through-Holes: Allows all Through-Holes to be tested on component side.
  • Barrel Optimize: Places test points for Through-Holes on opposite side of board from trace intersection. This ensures 100% test of Through-Hole conductivity.
  • Surface Mount Pads: Selects whether to test all Surface-Mount points or only endpoints.
  • Through-Hole Pads: Selects whether to test all Through-Hole points or only endpoints.
  • Test Vias: Selects whether to test vias or not.
  • Test Via Endpoints: Commonly used for In-Circuit test.
  • Use IPC Soldermask: Uses the Soldermask flag in an IPC file to identify exposed pad landings.

AutoGen

PentaLogix provides a pre-defined script for automatically running routine fixturing functions on simple to moderately complex PCBs. AutoGen automatically runs the following functions:

  • Remove Padstack: Redundant padstacks are automatically removed.
  • Assign Probes: Selects probe type for each D Code size and type.
  • Generate Test Points: Assigns test points to pads using test point generation options.
  • Stagger: Staggers Surface Mount test points in a two or three-point stagger, and staggers Through-Hole test points to the 0, 90, 180 or 270-degree position. Uses parameters assigned to each probe.
  • Step & Repeat: Steps netlist using pre-defined parameters.
  • Place PCB: Centers complete job within fixture.
  • Drop Pins: Solves pin placement from PCB personality to grid base, and optimizes pin deflection.
  • Spacer/ Airhole: Place your spacer locations and optionally add airholes.
  • Save New Job: Saves a new job file after all functions are complete.

Dynamic Drilling

In complex fixtures that have excessive pin lean, controlling target accuracy and pin binding can be difficult. PentaLogix solves this problem with a user-definable drill table. The drill table is divided into ten groups, 10%, 20%...90%, and 100% of pin lean. You select a hole size per pin, per plate for each category of pin lean. Or, enter all of your available drill sizes and, let the system fill out the table for you. Hole sizes are output in the drill files based on this table. Straight pins have excellent target accuracy, and leaning pins don't bind.

Ring Nets

Some netlist extraction methods define points along a complete loop of traces or in a plane layer as mid-points. This may result in nets where all points are defined as mid-points. With normal test point optimization, a complete circuit composed of mid-points may go untested. PentaLogix has developed a DRC algorithm that checks for such ring nets. You can inspect nets identified as ring nets and place the probes as you wish, or you can instruct the system to insert probes on all points of all ring nets.

Netlist Inspection

PentaLogix allows you to isolate and inspect a single net and edit test point placement one net at a time. The entire net, component side, solder side, and inner layers, is displayed without any other data for easy inspection. Color coding and special probe identifiers allow you to easily identify all elements of a single net. With the click of a mouse on our net inspection toolbar, you can easily add, delete, or modify test points.

Multiple Grid Support

You may identify component and solder side grids independently. The system supports Single, Dual, Quad, 5-Dice patterns, grid/ probe segregation, and many current and future grid styles. And you can even specify a main grid interval with multiple grid zones of different density as well as define maximim probe sizes for segregation. With independent Component and Solder Side grid parameters, as well as independent parameters for Probes, Deflections, Tolerances, and DRC Checks, the system is completely configurable for multiple testers in your department.

Flexible Editing Features

Flexibility is the key issue in Fixturing. Powerful editing functions allow changes on demand. These changes can be done after the Netlist has been generated, saving many hours in editing Gerber data and re-running a new Netlist.

  • Generate Test Points Automatically, or manually Insert, Delete, and Move Test Points as needed.
  • Stagger Test Points Automatically, or manually Stagger them as you wish.
  • Assign test points to grid Automatically, or manually Assign and Unassign them any way you want.
  • Transcode D Codes, Probe Codes, and Net numbers to meet your needs.
  • Set the Datum Point

Wire Wrap Functions

The system has a complete section devoted to the following wire wrap features that allow you to quickly generate road maps for Dedicated Fixtures or Clam Shell. You can use pre-defined dedicated fixture styles or create your own.

  • Combination Moving Probe and Dedicated Fixture Testing
  • Automatically Wrap Windowed Components
  • Add or Delete Test Points on the wire wrap path
  • Complete Support for PCB Verification
  • Net Replace To Existing Maps

Edit Road Maps: The following editing features allow you to edit the look of your road map for clarity and ease of use.

  • Control Digit Size, Orientation, Location, Start Numbers, and Frequency
  • Rubber Band Line Placement and Text Placement
  • Move and Hide Line Placement
  • Step & Repeat Wire Maps
  • Mirror Road Maps

Feature List

Input: Output: Tester Downloads:
  • Gerber
  • IPC-D-356/ 356A
  • Lavenir .F04 Netlist (IPC-D-356 plus trace data.)
  • ATF
  • NC Drill (Excellon and Sieb & Meyer)
  • CATE
  • TIF
  • Mania Def
  • Drill files for Multi-Plate Fixtures
  • Road Map for Wire Wrap
  • Interface Board Gerber
  • Job Files for Verification/Repair, Boilerplate Jobs, Archive, Split Net
  • IPC-D-356A
  • ATG1000
  • ATG2000
  • CAET
  • Circuit Line
  • E/C Kryterion 5000
  • EPC
  • Fastek
  • Integri
  • L&M
  • Mania
  • PDI
  • Trace
  • TTI
  • Utron
  • Viking
  • Nidec Read
  • Taio
  • Kyoei
Fixture plates: Viewing Data: Configuration Variables:
  • Up to 49 plates per Fixture, Component or Solder Side
  • Global Drill plate for each Fixture, Component or Solder Side
  • Display in 15 translucent Colors

Selecting Data:

  • Edit Mode (Drill or PCB)
  • Window
  • Highlighting
  • D Code
  • Tool Code
  • Net number
  • Relative/Absolute Coordinates
  • Pan
  • Redraw
  • Zoom Up, Down (.001 to 4000)
  • Zoom to Reference Level
  • Zoom on Window
  • Zoom to Show All
  • Show Nets
  • Show probes
  • Show Pads (All, or only with test points)
  • Show Datum Point
  • Show Fixture Tooling
  • Show Data Dimensions
  • Show Drill Counts
  • Show Traces (Current layer or current + inner layers)
  • Show Traces at Full Width
  • Fixture Plate and Space Definitions
  • Multiple Plate Material
  • Variable Tester Grid
  • Tool Definitions
  • Probe Definitions (49 per Fixture, Component and Solder Sides)
  • Test Point Assignment Parameters
  • Pin Deflection
  • Breakout Gap
  • Wire Wrap Sort
  • D Code to Probe Map
  • Tool Code to Probe Map
  • Split Net Parameters
  • Flip Test Parameters
Editing Tools: PCB/Test Point Editing Operations: Drill Editing Operations:
  • Editing Mode: PCB Data, Drill Mode, Wire Wrap Mode
  • Moveable Grid with Fixed Interval or Interval Variable with Zoom.
  • Highlight Pads
  • Highlight Nets
  • Highlight Test Points
  • Highlight Drills
  • Highlight Crossed pins
  • Highlight Head Butts
  • Highlight Breakouts
  • Highlight Unassigned Points
  • Highlight Translation Blocks
  • Window Selection
  • Window Move and Resize
  • Window Around all Data
  • Window Zoom
  • Place PCB
  • Step and Repeat PCB
  • Move, Mirror, Rotate PCB
  • Delete PCB Data
  • Set Datum
  • Generate Test Points
  • Stagger Test Points
  • Insert, Delete, Move Test Points
  • Drop Pins (Auto-Assign test points to grid)
  • Assign/Unassign Test Points to Grid manually
  • Split Nets
  • Replace Nets
  • Flip Test
  • Insert Drill
  • Delete Drill
  • Move Drill
  • Copy Drill
  • Transfer Drill
  • Replicate Drill
  • Transcode Tool Code
  • Step and Repeat Drill
Wire Wrap: Design Rule Check:
  • Automatic or Manual Wrapping
  • Designate Translation Blocks
  • Configure Wire Wrap Sort
  • Assign/Unassign Test Points to Translation Blocks
  • Edit Wire Wrap Road Map
  • Crossed pins
  • Head Butts
  • Breakouts
  • Unassigned Points
  • Pads Possibly Covered by Soldermask or Silksrceen

PCB Repair/Verification and Fixture Debugging

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Verify! displays the entire contents of a FixMaster job file, including silkscreen and soldermask data.
When you manually or automatically load fault data from your tester, Verify! correlates the fault data to the actual points and nets in the PCB data.

For the lastest Verify! specifications, please click here.

Current as of March, 2003 Specifications are subject to change without notice